PCIe/CXL Subsystem
High-performance PCIe and CXL controller IPs and Multi-Standard SerDes PHY IPs are combined to create best-in-class subsystems for the entire range of PCIe and CXL applications.
PCIe and CXL Subsystems
Alphawave Semi PCIe and CXL subsystems combine our highly configurable PiCORE PCIe controller or KappaCORE CXL controller IP with our industry leading multi-standard SerDes PHY solutions to create highly flexible, high-performance PCIe subsystems that are silicon-proven in most advanced nodes.
PCIe/CXL Controllers
KappaCORE CXL 3.0 Controller
The KappaCore Controller IP supports the CXL.io, CXL.cache and CXL.mem protocols for heterogenous computing environments. KappaCORE Controller supports CXL 3.0 upto 64 GT/s with backward compatibility for earlier versions such as CXL 1.1 and CXL 2.0.
KappaCORE Controller also supports PCIe for 2.5/5/8/16/32/64 GT/s PCIe rates.
PiCORE PCIe 6.0 64 GT/s Controller
The PiCore Controller IP supports the PCIe 6.0 for 2.5/5/8/16/32/64 GT/s PCIe rates.
PipeCORE and CXL SerDes PHY
1 to 64 Gbps PCI-Express (PCIe) 6.0 and CXL 3.0 PHY
Multi-Standard SerDes PHYs
Our PCIe and CXL Subsystems can also be paired with the industry’s leading portfolio of Multi-Standard SerDes PHYs and support a wide range of data rates and multiple signaling schemes.